1. Field of the Invention
The invention relates to MOS and SOS processing.
2. Prior Art
A continuing effort is occuring in the semiconductor industry to provide higher density integrated circuits. Numerous processes have been developed to provide these higher densities. Multilayer integrated circuit processing employing two and three layers of polysilicon with overlying metalization is used in some cases to increase circuit densities. V-notch MOS transistors are another example of a structure which is employed, in part, to increase circuit densities.
It has been known that some "transistor action" can be obtained in polysilicon as opposed to conventional monocrystalline silicon. Recent developments in laser annealing have shown that larger crystal grains may be formed in a polysilicon layer. In the present invention, this knowledge is used to provide transistors in a polysilicon layer.
The invented process employs unique alignment techniques, enabling multi-layer transistors to be fabricated. Alignment with buried members, such as a gate, is achieved with the present invention.